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Powering the Directed VLSI Firmware and Software Testing with Data Flow Aware Limited Branch Alternation
Authors
	Shcherbakov A.S.
Date of publication
	2014
Abstract
	Directed Automatic Random Testing method (DART) based on conditional jump equations solving with SAT is widely used in software testing. However, high coverage remains near infeasible goal due to the exponential growth of the test time. A simple while effective solution for a cardinal reduction of program testing path enumeration based on the symbolic equation tracking in conjunction with the repeative branch alternation limiting, is proposed.
Keywords
	Software testing, Software verification, dynamic verification, statement coverage, Software QA, code coverage, branch coverage, embedded Software, Firmware, automated testing, test generation
Library reference
	Shcherbakov A.S. Powering the Directed VLSI Firmware and Software Testing with Data Flow Aware Limited Branch Alternation // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2014. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2014. Part 2. P. 15-21.
URL of paper
	http://www.mes-conference.ru/data/year2014/pdf/D105.pdf