Speed-Independent Fused Multiply-Add Unit of Gigaflops Rating: Implementation Variants

Stepchenkov, Yu.A.; Rozhdestvenskij, Yu.V.; Diachenko, Yu.G.; Morozov, N.V.; Stepchenkov, D.Yu.; Surkov, A.V.

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Authors

Stepchenkov Yu.A.

Rozhdestvenskij Yu.V.

Date of publication

2014

Abstract

This report contains the results of development of two variants of Speed-Independed Fused Multiply-Add (SIFMA) conforming to IEEE 754 Standard. SIFMA performs either one double precision operation, or two simultaneous single precision operations with three operands. SIFMA was designed under industrial CMOS 65-nm technology. It operates with synchronous and asynchronous environments and provides performance up to 1 Gigaflops at 1.0 volt of supply voltage and 25 Celsius degrees. At this, power efficiency does not exceed 970 mJ/GHz

Keywords

self-timed circuit, multiplier, adder, subtracter, pipeline, indication

Library reference

Stepchenkov Yu.A., Rozhdestvenskij Yu.V., Diachenko Yu.G., Morozov N.V., Stepchenkov D.Yu., Surkov A.V. Speed-Independent Fused Multiply-Add Unit of Gigaflops Rating: Implementation Variants // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2014. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2014. Part 4. P. 57-60.

URL of paper

http://www.mes-conference.ru/data/year2014/pdf/D074.pdf