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Minimization of undesired layout patterns during standard cell synthesis
Authors
	Ryzhenko N.V.
	Sorokin A.A.
	Bykov S.A.
	Talalay M.S.
Date of publication
	2014
Abstract
	A new class of geometric design rules appears for coming nanometer technologies. These rules describe layout patterns, which are valid but undesired for optical lithography. Minimization of such undesired patterns increases the yield. In this paper we present an algorithm which reduces the number of undesired patterns during standard cell synthesis. Key components of the algorithms are: a description of rules via Boolean expressions of states of discrete layout objects and usage of the Boolean satisfiability problem for search of a solution with given constraints. Experimental results demonstrated applicability of the approach for a wide class of design rules and standards cells.
Keywords
	routing, standard cells, cell library, Boolean satisfiability, optical lithography
Library reference
	Ryzhenko N.V., Sorokin A.A., Bykov S.A., Talalay M.S. Minimization of undesired layout patterns during standard cell synthesis // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2014. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2014. Part 1. P. 121-126.
URL of paper
	http://www.mes-conference.ru/data/year2014/pdf/D038.pdf