Study of mapping processor for dataflow parallel computing system "Buran" |
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Authors |
| Levchenko N.N. |
| Okunev A.S. |
| Yakhontov D.E. |
Date of publication |
| 2012 |
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Abstract |
| The paper reviews the architecture of dataflow parallel computing system "Buran", describes the operation mechanisms of one of the main system modules – the mapping processor. The pipeline mode of mapping processor is considered; different variants of the pipeline construction and its optimization are given. An increasing of the capacity associated with the introduction of the pipeline is estimated. |
Keywords |
| dataflow parallel computing system; mapping processor; pipelining; throughput; |
Library reference |
| Levchenko N.N., Okunev A.S., Yakhontov D.E. Study of mapping processor for dataflow parallel computing system "Buran" // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2012. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2012. P. 467-470. |
URL of paper |
| http://www.mes-conference.ru/data/year2012/pdf/D118.pdf |