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IR voltage drop and Electromigration Aware Wire Sizing Algorithm
Authors
	Sheblaev M.V.
	Plehanov A.S.
Date of publication
	2010
Abstract
	An important problem in network design is to use the minimum amount of chip area for wiring, while avoiding potential reliability failures due to electromigration and excessive IR drop. The term "electromigration" is applied to mass transport in solid state metals when the metals are stressed at high current densities. IR-drop is the voltage fluctuation due to the resistance of delivery network. According to the semiconductor process, there is a requirement for minimum wire width. In this paper we introduce maximal width constraints to avoid clearance rules violation and wire weights to adjust wire sizes to existing layout. We present a constraint graph based algorithm of sizing the width of routed wires so that the chip area required by the routes is minimized subject to IR-drop, EM, minimal and maximal width constraints.
Keywords
	IR-drop, Electromigration, Routing, Optimization
Library reference
	Sheblaev M.V., Plehanov A.S. IR voltage drop and Electromigration Aware Wire Sizing Algorithm // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2010. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2010. P. 196-199.
URL of paper
	http://www.mes-conference.ru/data/year2010/papers/m10-166-13241.pdf