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The Methods of Fast Characterization of Large Scale Integration Parameterized IP-blocks
Authors
	Gudkova O.N.
	Skachkova E.P.
	Muhanyuk N.N.
	Gavrilov S.V.
	Solovyev R.A.
Date of publication
	2010
Abstract
	Several approaches of IP-blocks’ characterization speed-up are proposed. The first proposed approach concerns circuit reduction via removal of subcircuits, which practically don’t affect the simulation results. The combination of following different types of reduction are proposed: removal of inactive parts of circuit basing on the information regarding IP-block structure; removal of inactive parts of circuit basing on the preliminary calculations using fast simulation; removal of circuit parts basing on the automatic circuit decomposition on subcircuits; direct current connected components (DCCC). Another proposed approach is based on reduction of number of electrical simulation runs by means of detection and reduction of repeated similar calculations, which are usually performed for different input transition time and output capacitive load values.
Keywords
	Characterization, IP-block, DCCC (Direct Current Connected Component)
Library reference
	Gudkova O.N., Skachkova E.P., Muhanyuk N.N., Gavrilov S.V., Solovyev R.A. The Methods of Fast Characterization of Large Scale Integration Parameterized IP-blocks // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2010. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2010. P. 154-159.
URL of paper
	http://www.mes-conference.ru/data/year2010/papers/m10-16-14042.pdf