| Base ternary logic element on the basis of standard CMOS-technology |
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| Authors |
| | Korotkov A.S. |
| | Morozov D.V. |
| | Pilipko M.M. |
| Date of publication |
| | 2008 |
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| Abstract |
| | Realization of a base logic element (gate) of a balancing ternary code is offered. Logic conditions are provided due to the bipolar power supply. The base gate can be implemented on the basis of standard CMOS-technology. Results of circuit simulation are presented at a voltage supply ±0.9 V with use of parameters 0.18 microns on the basis of platform Cadence Virtuoso. |
| Keywords |
| | Ternary logic element, CMOS-technology |
| Library reference |
| | Korotkov A.S., Morozov D.V., Pilipko M.M. Base ternary logic element on the basis of standard CMOS-technology // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2008. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2008. P. 466-471. |
| URL of paper |
| | http://www.mes-conference.ru/data/year2008/88.pdf |
