Investigation and optimization of technological parameters of formation of the logical structure of the cells on "Silicon on Insulator" |
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Authors |
| Dolgij L.N. |
| Efremov V.A. |
| Nelayev V.V. |
| Stempitsky V.R. |
Date of publication |
| 2008 |
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Abstract |
| The results of physical modeling of SOI technology and logic CMOS cell was presented. Optimization of technological parameters of manufacturing process of a CMOS cell was performed using the response surface methodology. |
Keywords |
| SOI structure, physical modeling, process optimization, response surface methodology |
Library reference |
| Dolgij L.N., Efremov V.A., Nelayev V.V., Stempitsky V.R. Investigation and optimization of technological parameters of formation of the logical structure of the cells on "Silicon on Insulator" // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2008. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2008. P. 169-172. |
URL of paper |
| http://www.mes-conference.ru/data/year2008/28.pdf |