| Accuracy Improvement of the Interconnect Parasitic Capacitance Extraction |
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| Authors |
| | Rusakov A.S. |
| | Khapaev M.M. |
| Date of publication |
| | 2008 |
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| Abstract |
| | For the modern technologies analytical methods of the parasitic chip wires capacitance estimation do not provide with acceptable level of the accuracy. On the other hand methods for the Laplace equation solution based on the FEM or BEM require huge computational resources. That's why modern programs of interconnect extraction are developed in assumption of the typical patterns of the chip interconnect wires, and extending extraction pattern library leads again to more expensive computations. In this work we propose an semi-analytical method, which provides with acceptable accuracy for a set of wire patterns and does not lead to slower capacitance extraction runtime. |
| Keywords |
| | parasitic capacitance extraction |
| Library reference |
| | Rusakov A.S., Khapaev M.M. Accuracy Improvement of the Interconnect Parasitic Capacitance Extraction // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2008. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2008. P. 150-153. |
| URL of paper |
| | http://www.mes-conference.ru/data/year2008/24.pdf |
