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Logical timing analysis of digital IC reliability with NBTI and HCI degradation effects

Authors
 Gudkova O.N.
 Gavrilov S.V.
Date of publication
 2008

Abstract
 Nowadays, hot carrier injection effect (HCI) and the negative bias temperature instability (NBTI) became a primary factor that degrades the performance of integrated circuits. Today there are verification tools which can take into account degradation effects only on electrical (transistor) level. Lifetime of IC depends of logic and the development of algorithms, models and tools for degradation-aware timing analysis on logic level is a serious issue. In this article the signal probability propagation algorithm is proposed in order to improve accuracy of degradation’s estimation.
Keywords
 Negative Bias Temperature Instability (NBTI), Hot Carrier Injection (HCI), threshold voltage, static timing analysis
Library reference
 Gudkova O.N., Gavrilov S.V. Logical timing analysis of digital IC reliability with NBTI and HCI degradation effects // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2008. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2008. P. 30-35.
URL of paper
 http://www.mes-conference.ru/data/year2008/03.pdf

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