Home
Authors Papers Year of conference Themes Organizations To MES conference
Development of a Digital Integrated Circuits Visualization Algorithms at the Gate Level |
|
|
|
|
Authors |
| Goglev G.I. |
| Tiunov I.V. |
Date of publication |
| 2022 |
DOI |
| 10.31114/2078-7707-2022-4-44-49 |
|
Abstract |
| Modern computer aided design systems are developed using graphical user interfaces. The use of such interfaces makes it possible to simplify and speed up the development of devices. In this paper, the problem of developing a tool for graphic design of digital integrated circuits at the logical level is considered.
The introduction explains the relevance of the task of developing a graphic design tool based on economic considerations and domestic policy.
The second chapter deals with the problem of developing a hierarchical graph model for the representation of digital circuits at the logical level. A graph model is proposed and its application for an real c17 circuit from ISCAS’89 benchmark is demonstrated.
The third chapter is devoted to the development of an algorithm for placing elements on a discrete area. The chapter briefly describes the features of power algorithms and ranking algorithms. It is concluded that ranking algorithms are better suited for visualizing circuits at the logical level, since they simplify the analysis of signal propagation. A block diagram of the ranking algorithm based on the proposed graph model is presented.
The fourth chapter is devoted to the development of an algorithm for tracing interconnections. The features of ray tracing algorithms and wave tracing algorithms are considered. It is concluded that ray tracing is better suited for solving the problem of circuit visualization, based on the features of the software implementation and the visual simplicity of the resulting circuit. Also, a block diagram of the ranking algorithm based on the proposed graph model is presented.
The fifth chapter presents the results of the work of the developed algorithms, which were implemented in a software module. Circuits from the ISCAS’89 test suite were taken for testing.In conclusion, the results of the work are summarized. |
Keywords |
| design automation, graphical design, placement algorithms, routing algorithms, visualization, CAD. |
Library reference |
| Goglev G.I., Tiunov I.V. Development of a Digital Integrated Circuits Visualization Algorithms at the Gate Level // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2022. Issue 4. P. 44-49. doi:10.31114/2078-7707-2022-4-44-49 |
URL of paper |
| http://www.mes-conference.ru/data/year2022/pdf/D074.pdf |
|
|