| Library composition optimization for self-timed circuit synthesis |
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| Authors |
| | Plekhanov L.P. |
| Date of publication |
| | 2022 |
| DOI |
| | 10.31114/2078-7707-2022-4-15-20 |
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| Abstract |
| | Self-timed digital circuits have a number of advantages over other circuit types. To ensure these advantages, it is necessary the special building of the memory units, the information part of the circuits, and an indication subcircuit. One of the main problems of the self-timed circuit synthesis is to reduce costs in transistors and improve the performance of the circuit’s information part and indicator subcircuit. Both factors directly depend on the availability of single-stage cells with one output and a large number of inputs in the library for synthesis. The aim of the work was to find a regular way to define such cells. A formalized method for selecting library logic cells for the synthesis of self-timed circuits is proposed. The method makes it possible to form such a library composition that will give optimal solutions for the self-timed circuit synthesis in terms of complexity in transistors and speed. |
| Keywords |
| | self-timed circuits, synthesis of self-timed circuits, cell libraries |
| Library reference |
| | Plekhanov L.P. Library composition optimization for self-timed circuit synthesis // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2022. Issue 4. P. 15-20. doi:10.31114/2078-7707-2022-4-15-20 |
| URL of paper |
| | http://www.mes-conference.ru/data/year2022/pdf/D072.pdf |
