| Hardware Implementation of a Neural Network for Object Detection in FPGA |
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| Authors |
| | Kustov A.G. |
| | Solovyev R.A. |
| | Stempkovsky A.L. |
| | Telpukhov D.V. |
| Date of publication |
| | 2022 |
| DOI |
| | 10.31114/2078-7707-2022-1-27-34 |
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| Abstract |
| | the article proposes a technique for transferring the architecture of a modern CenterNet neural network to an FPGA. The CenterNet network is OneStage detector and is used to detect and localize objects in images. This neural network has good performance in terms of accuracy and at the same time is distinguished by the simplicity of the decoder. As a result of the research, it was possible to achieve a very high speed of the neural network at the hardware level by choosing an encoder suitable for hardware implementation, efficient hardware implementation of both the decoder and the last layer with object filtering, and switching to fixed-point calculations. At the same time, the quality of the obtained predictions remains high. |
| Keywords |
| | object detection, neural network hardware, FPGA, Fixed-point arithmetic, 2D convolution. |
| Library reference |
| | Kustov A.G., Solovyev R.A., Stempkovsky A.L., Telpukhov D.V. Hardware Implementation of a Neural Network for Object Detection in FPGA // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2022. Issue 1. P. 27-34. doi:10.31114/2078-7707-2022-1-27-34 |
| URL of paper |
| | http://www.mes-conference.ru/data/year2022/pdf/D010.pdf |
