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User applications synthetic clones generation for functional verification
Authors
	Grevtsev N.A.
	Krasnyuk A.A.
	Orlov D.O.
	Chibisov P.A.
Date of publication
	2021
DOI
	10.31114/2078-7707-2021-3-50-56
Abstract
	Low speed of an RTL-level code simulation is the main reason behind the practical inability of a full-fledged startup of an operating system and end user applications under OS control on RTL simulators. This makes it impossible to guarantee the lack of critical errors in a taped-out microprocessor VLSI. An operating system startup alone on a target working frequency could allow us to find the majority of the remaining errors before they escape into the production stage. This paper presents a technique of user applications synthetic clone creation which may be used for the functional verification of the target microprocessor’s RTL model. Synthesis of reduced test clones may be considered practical under two conditions. The test must repeat the given machine code execution characteristics of a source application (which means that it is a representative set of processor instructions). It must also attain the same coverage results in much less time. An amount of such short and representative tests, which can run on the RTL model in less than 10 minutes, might be used instead of lengthy original programs, which cannot be executed in a given time. The presented approach allows to utilize the benefits of user application execution from a point of an error detection at an early stage of microprocessor’s RTL model, when the cost of its correction is minimal. Early detection of micro-architectural errors may also be achieved by inclusion of an equivalent “extract” of user applications, obtained by presented techniques, into the pseudo random tests.
Keywords
	functional verification, synthetic benchmarks, coverage metrics, performance tests, control flow graph, guided test generation, cyclomatic complexity of a program, Synthetic Benchmark.
Library reference
	Grevtsev N.A., Krasnyuk A.A., Orlov D.O., Chibisov P.A. User applications synthetic clones generation for functional verification // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2021. Issue 3. P. 50-56. doi:10.31114/2078-7707-2021-3-50-56
URL of paper
	http://www.mes-conference.ru/data/year2021/pdf/D078.pdf