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A CMOS Thermometer-to-Binary Encoder for a Flash ADC |
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Authors |
| Pilipko M.M. |
| Morozov D.V. |
Date of publication |
| 2021 |
DOI |
| 10.31114/2078-7707-2021-2-55-62 |
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Abstract |
| Flash analog-to-digital converter (ADC) is known for its high conversion speed [1–4]. An important part of a flash ADC is the thermometer-to-binary encoder. Errors occur in the thermometric code, which means that a logical zero appears among logical ones, or vice versa. The reasons for such errors can be the displacement of two adjacent comparators levels [1, 6] and the difference in the delay times of signal processing by the comparators [5, 6]. Errors reduce the effective number of bits of a flash ADC [5–8]. Some circuits are known to implement a thermometer-to-binary encoder [5, 9–11]. An idea of a reference encoder is proposed to compare errors of real circuits. Only certain types of errors are most probable [12]. The adder-based encoder has the best resistance to errors. The adder proposed in [13] is the fastest due to the separate formation of the sum and carry functions. The sum is formed as a series connection of two two-input XOR logical elements [14], and the carry is formed by a three-input majority element. A new encoder is presented as an alternative. It uses the same logic cells but has a different structure. MATLAB simulation compares the new structure with known encoders and error correction circuits [1-16]. The presented encoder structure is as effective in handling errors in the input code as the adder-based one. A 65-nm CMOS technology was applied to synthesize and simulate circuits using Cadence software. In comparison with the adder-based circuit, the presented encoder has a 34-45% lower delay while needs 10-12% more transistors for bit widths up to 8. |
Keywords |
| Analog-digital conversion, thermometer code, code conversion, logic gates, error correction, CMOS technology. |
Library reference |
| Pilipko M.M., Morozov D.V. A CMOS Thermometer-to-Binary Encoder for a Flash ADC // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2021. Issue 2. P. 55-62. doi:10.31114/2078-7707-2021-2-55-62 |
URL of paper |
| http://www.mes-conference.ru/data/year2021/pdf/D014.pdf |
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