Home         Authors   Papers   Year of conference   Themes   Organizations        To MES conference

Automation of High-Level Network-on-Chip Modeling
Authors
	Amerikanov A.A.
Date of publication
	2021
DOI
	10.31114/2078-7707-2021-1-39-45
Abstract
	This work is devoted to the automation of the process of high-level modeling of network-on-chip (NoC). The main stages of designing NoC are considered. Highlighted the place of high-level modeling in the process of designing NoC. A review and classification of high-level NoC models is carried out. The main parameters of the models, based on which the choice of models for the creation of a unified infrastructure for high-level modeling of NoC: topology and routing algorithm, were highlighted. A selection of high-level models was made for the implementation of a single infrastructure, BookSim, Newxim, UOCNS. The main aspects of the work of a unified infrastructure are given. Methods for automating the high-level modeling process are proposed: parallel computations, the comparative method, the golden section method, and Monte Carlo method. Parallel launch of the models has significantly reduced the simulation time. With the simultaneous launch of 8 models, we managed to achieve a 2.7-fold acceleration, compared to the sequential method of launching models. The comparative method allows simulating the same network in different models, thereby increasing the accuracy and reliability of the output characteristics. The comparative method also allows us to verify new models when they are added to a single information environment for high-level modeling of NoC. The Golden Ratio Method and the Monte Carlo Method will reduce the number of models launches when selecting parameters. Approbation of a unified infrastructure is carried out, the results of modeling of various networks are shown. Further plans for the improvement of the unified infrastructure are described.
Keywords
	network-on-chip, high-level simulation, high-level model, network-on-chip design.
Library reference
	Amerikanov A.A. Automation of High-Level Network-on-Chip Modeling // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2021. Issue 1. P. 39-45. doi:10.31114/2078-7707-2021-1-39-45
URL of paper
	http://www.mes-conference.ru/data/year2021/pdf/D012.pdf