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Research of methods and tools of verification of projects and generation of tests of microelectronic systems

Authors
 Zolotorevich L.A.
Date of publication
 2006

Abstract
 The characteristic and results of operation of own system VLSI_SIM for logic designing and generation of tests of digital VLSI and programs of simulation ModelSim of Mentor Graphics is resulted. The analysis of efficiency of the methods of simulation realized in system VLSI_SIM and generation of tests is given. The received theoretical results in the field of simulation of VLSI failures both at a structural level, and at a level of behaviour, and also directions of development of functionalities of system are considered.
Keywords
 verification of projects, generation of tests of microelectronic systems
Library reference
 Zolotorevich L.A. Research of methods and tools of verification of projects and generation of tests of microelectronic systems // Problems of Perspective Microelectronic Systems Development - 2006. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2006. P. 163-168.
URL of paper
 http://www.mes-conference.ru/data/year2006/29.pdf

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