Home         Authors   Papers   Year of conference   Themes   Organizations        To MES conference

Research of high-voltage complementary junction field-effect transistors over a range of temperature using methods of TCAD process/device modeling  

Authors
 Drozdov D.G.
 Prokopenko N.N.
 Savchenko Ye.M.
 Dukanov P.A.
 Grushin A.I.
Date of publication
 2020

Abstract
 This article presents results of TCAD process and device modeling of complementary junction field-effect transistors, integrated in microwave complementary bipolar technology process. A study of the models was carried out in order to analyze the operation of transistors. Models and solution methods needed for calculations over a wide range of temperature up to cryogenic ones were selected. Among these models were the Philips mobility model, the model of an impurity incomplete ionization, the self-heating model, etc. The results of varying the model coefficients of an impurity incomplete ionization, described in the literature, were analyzed and no significant difference was found. The possibility of using a simplified model for calculating thermal effects that effectively simulated the effect of self-heating was shown. This was especially important in calculations for cryogenic temperatures, where convergence is significantly reduced when solving a system of differential equations. The choice of a solution algorithm was shown to be an effective method of achieving convergence with decreasing temperature. The most efficient algorithm for cryogenic temperature was SLIP90. This algorithm provided the calculation of current-voltage characteristics for the following objects and tasks: multi-gate transistors at temperatures corresponding to the beginning of the region of “freezing out” of impurity charge carriers, the presence of areas with a floating potential, etc. Taking into account the developed design technique, the temperature dependences of the main parameters of complementary JFETs were analyzed, and a number of constructive and technological solutions to reduce the influence of ultra-low temperatures on the parameters of transistors were proposed. The drain-source voltage range of the complementary junction field-effect transistors was also determined taking into account the temperature. It was found that a change in temperature had a greater effect on the p-channel junction field-effect transistor, and the use of the emitter region as the upper gate affected the temperature stability. Reducing the cutoff voltage allowed us to reduce the effect of temperature on the shorted-gate drain current over a range of temperature of CJFET.
Keywords
 complementary JFET, technology computer aided design, cryogenic temperature
Library reference
 Drozdov D.G., Prokopenko N.N., Savchenko Ye.M., Dukanov P.A., Grushin A.I. Research of high-voltage complementary junction field-effect transistors over a range of temperature using methods of TCAD process/device modeling // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2020. Issue 4. P. 66-75.
URL of paper
 http://www.mes-conference.ru/data/year2020/pdf/D071.pdf

Copyright © 2009-2024 IPPM RAS. All Rights Reserved.

Design of site: IPPM RAS