| Instruction set architecture R2T |
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| Authors |
| | Erokhin V.V. |
| Date of publication |
| | 2020 |
| DOI |
| | 10.31114/2078-7707-2020-3-165-171 |
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| Abstract |
| | Multi-bit processors instruction set architecture (ISA) is described. The ISA consists of set for “usual” processor and set for embedded applications. |
| Keywords |
| | architecture, processor, instruction system. |
| Library reference |
| | Erokhin V.V. Instruction set architecture R2T // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2020. Issue 3. P. 165-171. doi:10.31114/2078-7707-2020-3-165-171 |
| URL of paper |
| | http://www.mes-conference.ru/data/year2020/pdf/D063.pdf |
