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Directions and methods for improving the performance of microprocessors
Authors
	Bobkov S.G.
Date of publication
	2020
DOI
	10.31114/2078-7707-2020-4-127-133
Abstract
	The main directions and methods of improving the performance of high-performance microprocessors are considered. The main direction of increasing performance is to improve the architecture of microprocessors. Two architectures are being developed in Russia: EPIC architecture by MCST and RISC architecture by a number of Russian companies. However, none of these areas can give a drastic increase in performance. The directions that can fundamentally improve the characteristics of microprocessors due to the new architecture and technological processes are considered. One of the directions may be the creation of processors with a data flow model of calculations with a dynamically formed context. The advantage of such processor is the possibility of hardware parallelization of tasks into hundreds of cores, a simpler architecture, and a significant reduction in the required volume of RAM for organizing calculations. However, such processors must have a fully associative memory of about 100 KB per processor. Another direction is the creation of 3D processor-memory structures, when layers of memory are applied on top of the processor crystal. To create the required technological process, radiation methods can be used for controlled conversion of atomic composition under the influence of light ion radiation. Back in the early 2000s, a method of selective removal of atoms was developed, allowing, for example, to make metals from oxides. The most promising memory for such tasks is memory on nanotubes, although memory on other physical principles can also be used. Such approaches can increase the performance of computers by tens or hundreds of times.
Keywords
	microprocessor, architecture, performance, data flow processor, 3D structures.
Library reference
	Bobkov S.G. Directions and methods for improving the performance of microprocessors // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2020. Issue 4. P. 127-133. doi:10.31114/2078-7707-2020-4-127-133
URL of paper
	http://www.mes-conference.ru/data/year2020/pdf/D060.pdf